Automated AV scheduling system for Q-SYS Designer. Time-based control of video matrix input switching and projector power management with separate weekday/weekend schedules. Single Lua script for Control Script components.
Real-time video processing pipeline on Cyclone V FPGA (DE1-SoC). Features OV7670 camera capture, Avalon-MM masters for SDRAM frame buffering, hardware Ping-Pong double-buffering, and a custom VGA controller driving the onboard ADV7123 Video DAC for tearing-free 640x480 @ 60Hz display.
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