feat(simd): re-export AMX/VNNI int8 GEMM (matmul_i8_to_i32) through simd.rs#216
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…imd.rs
Surface hpc::amx_matmul::{matmul_i8_to_i32, amx_available} via the canonical
ndarray::simd::* consumer entry (W1a "all SIMD from ndarray::simd"), std-gated.
This lets a consumer reach the full int8 dispatch ladder -- AMX TDPBUSD tile
(byte-asm, 16384 MAC/instr, Sapphire Rapids+) -> AVX-512 VPDPBUSD -> AVX-VNNI ->
scalar, bit-identical across tiers -- without dipping into hpc::amx_matmul
directly. Additive re-export only; no behaviour change.
Consumed by turbovec's ndarray::simd-routed polyfill scan
(lance-graph-turbovec), which scores TurboQuant as a batched int8 GEMM so the
SIMD/AMX backend selection lives in ndarray, not the consumer.
https://claude.ai/code/session_01D2WSmezQBNC3bUdHuGfGmo
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| #[cfg(feature = "std")] | ||
| pub use crate::hpc::amx_matmul::{amx_available, matmul_i8_to_i32}; |
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On any std build for a non-x86_64 target, this import refers to crate::hpc::amx_matmul, but src/hpc/mod.rs only declares amx_matmul under #[cfg(target_arch = "x86_64")]. Since src/lib.rs still compiles pub mod simd for all std targets, default aarch64/wasm/s390x builds now fail with an unresolved import before consumers can use the crate. Please add the same target_arch = "x86_64" gate here or route to a portable wrapper.
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Surface hpc::amx_matmul::{matmul_i8_to_i32, amx_available} via the canonical
ndarray::simd::* consumer entry (W1a "all SIMD from ndarray::simd"), std-gated.
This lets a consumer reach the full int8 dispatch ladder -- AMX TDPBUSD tile
(byte-asm, 16384 MAC/instr, Sapphire Rapids+) -> AVX-512 VPDPBUSD -> AVX-VNNI ->
scalar, bit-identical across tiers -- without dipping into hpc::amx_matmul
directly. Additive re-export only; no behaviour change.
Consumed by turbovec's ndarray::simd-routed polyfill scan
(lance-graph-turbovec), which scores TurboQuant as a batched int8 GEMM so the
SIMD/AMX backend selection lives in ndarray, not the consumer.
https://claude.ai/code/session_01D2WSmezQBNC3bUdHuGfGmo